1. Field of the Invention
The present invention generally relates to the field of manufacturing of semiconductor devices, and, more particularly, to the packaging of integrated circuits, to stacked integrated circuits, to test structures for determining the stability of such devices with respect to electromigration and to a method for fabricating such test structures.
2. Description of the Related Art
Integrated circuits comprise a large number of individual circuit elements, such as transistors, capacitors and resistors. These elements are internally connected to form complex circuits like memory devices, logic devices and microprocessors. In particular, logic devices and microprocessors require a large number of input/output terminals to provide for connection with other electronic devices. Improving the performance of integrated circuits requires reducing feature sizes. Besides allowing for an increase of operating speed due to reduced signal propagation delays, this makes it possible to increase the number of functional elements of the circuit in order to increase its functionality. This, however, entails the need for a greater number of input/output connections. Thus, the available space for one of these connections is reduced. In this context, it is advantageous to electrically connect an integrated circuit to a substrate by means of flip-chip techniques. In contrast to wire bonding, where flexible metal wires providing electrical connections to peripheral devices are fixed at the perimeter of the chip, flip-chip methods make it possible to utilize the whole area of the chip for making connections.
A schematic sketch of a flip-chip bonded integrated circuit is shown in FIG. 1. In flip-chip assembly, an integrated circuit 101 is connected to a substrate 102 by means of electrically conductive bumps 103, 104, 105 which are formed on bond pads 106, 107, 108 provided on a surface of the chip 101, which also comprises electronic components 109. On the substrate 102, bond pads 110, 111, 112 on locations corresponding to the locations of the bond pads 106, 107, 108 of the chip 101 are provided. The chip 101 is attached to the substrate 102 such that the bond pads 106, 107, 108 on chip 101 and bond pads 110, 111, 112 of the substrate face each other. The bumps 103, 104, 105 provide electrical and mechanical connection between the chip 101 and the substrate 102. The substrate 102 can be, for example, a circuit board, a carrier or a flex substrate. Techniques where bond pads are connected by means of bumps can also be used to directly connect stacked chips.
Reducing the size of bond pads and bumps results in an increase in the current density, i.e., the amperage per cross-sectional area of a current flowing through a bump increases. This increased current density increases the likelihood of electromigration occurring.
Electromigration is the current-induced transport of metal atoms in conductors. Electrons moving in an electrical field exchange momentum with the atoms. At high current densities, the momentum imparted to the atoms forms a net force which is high enough to propel atoms away from their sites in the crystal lattice. Consequently, metal atoms pile up in the direction of electron flow. Electromigration is known to depend on various factors, in particular, current density, temperature, temperature gradient and mechanical stress. If electromigration occurs in a bump which provides electrical contact between substrates, the shape of the bump is altered. In the course of time, the bump is destroyed and electrical contact between the substrates is lost.
FIGS. 2a-2b schematically show the degradation of a bump by electromigration. Bump 205 provides electrical and mechanical contact between bond pads 204, 206 being provided in a first substrate 201 and a second substrate 202 and being connected to electrical connections 203, 207. The shape of a newly-formed bump 205 (FIG. 2a) changes to a shape as shown in FIG. 2b as bump 205 is degraded by electromigration effects.
If the size of connections comprised of bumps and bond pads in semiconductor devices is to be further reduced, it is necessary to adapt the design of bumps and bond pads in order to avoid adverse consequences regarding the performance of the device due to electromigration effects.
In view of the above-mentioned problems, a need exists for techniques which allow investigation of electromigration effects in conductive connections.